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Description: fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
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Size: 7812 |
Author: zqh |
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Description: 1024点FFT快速傅立叶变换,包含说明文档和VHDL源代码,16位输入/输出,带DMA功能,xilinx的ip-1024-point FFT fast Fourier transform, and includes documentation, VHDL source code, 16 input / output, with DMA function, the ip xilinx
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Size: 629675 |
Author: 刘超 |
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Description: 该程序是vhdl语言编写的fft变换的ip核代码,程序中共包含了36个.vhd文件-that the procedure was prepared by the vhdl language fft transform ip nuclear code CPC procedures contained 36. vhd documents
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Size: 29774 |
Author: 袁汇 |
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Description: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
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Size: 1024 |
Author: elisen |
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Description: 用于FFT的VHDL语言的源代码 比较全面功能也是 但我的老师说相对来说也复杂些-FFT of the VHDL language for the source code is more comprehensive features, but my teacher said is also relatively more complicated
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Size: 64512 |
Author: wangliang |
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Description: This a code for FFT in VHDL, Verilog & C
Source: OpenCores.org-This is a code for FFT in VHDL, Verilog & C
Source: OpenCores.org
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Size: 3125248 |
Author: Kiran |
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Description: 通过调用quartus ii中的宏模块,优化源代码。这样,我们就能节能自己优化代码的时间。源代码中的FFT是基—2算法。-By calling the quartus ii macro module, optimize the source code.so,we can save the time to optimize the source code by yourself.This code is base-2 of FFT algorithm,a simple algorithm to relize by VHDL.
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Size: 6522880 |
Author: 陈家明 |
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Description: 基于VHDL的FFT的源代码,,包能使用,放心下载。可直接使用。
-Of VHDL FFT-based source code, the package can use, rest assured download. Can be used directly.
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Size: 29696 |
Author: qijgd |
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Description: Very simple source code written in VHDL for FFT design.
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Size: 1024 |
Author: |
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Description: code for fft non synthesisable in xilinx ise
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Size: 46080 |
Author: aravindh |
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Description: 青创电子的驱动FFT显示屏的VHDL程序代码,-Green and electronic drive FFT display screen of VHDL program code,
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Size: 2048 |
Author: JIM |
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Description: i m sending hdl code of dm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.-i m sending hdl code of ofdm using verilog and vhdl with all blocks contain fft,ifft,scrambler,transmitter,receiver.
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Size: 28672 |
Author: Nilesh panchal |
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Description: FFT VHDL with a fast Fourier transform papers, including the principle of analysis and code for 8 to 256 number of points
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Size: 10240 |
Author: qwe |
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Description: 数字信号处理的FPGA实现最新版的源代码,涉及FFT变换、IIR、FIR数字滤波器等的verilog及vhdl代码-<digital signal processing with FPGA> (the latest version) . the source code involving FFT transform, IIR, FIR digital filters by verilog and vhdl.
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Size: 19156992 |
Author: Rick007007 |
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Description: Embedded SoPC Design with Nios II Processor and Verilog Examples
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Size: 657408 |
Author: davido
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